The present invention relates generally to packaged integrated circuits, and more specifically to a scheme for substantially increasing the number of input and output ports for a packaged integrated circuit.
With the ability to form denser circuits on, for example, LSI and VLSI, the number of input and output ports which must be provided exceeds the present integrated circuit assembly technology. The die or wafer in which the circuits are built, presently are connected on the chip by interconnects to bond pads available on the periphery of the chip. Thus, the number of bond pads are limited by the peripheral dimension of the chip taking into consideration required minimum spacing between bond pads and minimum bond pad area. Also, the requirement to run interconnects from the circuits displaced from the periphery of the die to the bond pads place design restraints on the integrated circuit layout as well as producing undesirable capacitance and increase resistance. Similarly, with the present technology, the method of connecting the bond pads to the external pins via bonded wires limited the pin count as well as pin reliability. As the pin count moves upward of 100 pins, a very small error rate in the bond wires at increased pin counts will become undesirable and approach asymtotically zero.
To overcome the problems of the prior art and provide a substantially unlimited number of input-output ports for a packaged integrated circuit, it is proposed that optical input and output ports be provided throughout the integrated circuit. This does not limit the input-output ports of the periphery of the integrated circuit and also substantially reduces the interconnects running across the circuit. Similarly, reliability or yield of the packaged integrated circuits is increased. The integrated circuit includes a polycrystalline support material having single crystalline silicon regions in the surface and electro-optical conversion material regions also in the surface. The circuits of the integrated circuit are formed in the silicon regions and the transmitting and receiving means are built in the electro-optical conversion material regions. Alternatively, the receiving means may be formed in single crystal silicon regions. The integrated circuit die is mounted into the base of a housing and the lid of the housing, which includes apertures and optical conduits, is aligned to the transmitting and receiving means on the die before the lid is secured to the body of the housing. The optical conduits are spaced from the die surface and have a length equal to the thickness of the lid. This assures alignment of the conduit to the die. Electrical conductors may be provided exterior the housing for power inputs.
A method of assembly includes providing a plurality of alignment optical signal emitting devices on the die or wafer, mounting the wafer in the base of the housing, providing a corresponding plurality of alignment optical signal conduits in the lid, activating the plurality of alignment optical signal emitting devices and aligning the corresponding optical signal conduits with respective alignment optical signal emitting devices before securing the lid to the base.
The method of fabricating the monolithic integrated circuit having the electro-optical material and single crystalline silicon in the surface of a polycrystalline support includes forming trenches in the first surface of a wafer of electro-optical conversion material and covering the first surface and trench with a containment layer. The trenches are then overfilled with polycrystalline silicon material and electro-optical conversion material is removed from a second side of the wafer opposite the first surface to a level exposing the polycrystalline silicon in the trenches. Selective portions of the polycrystalline silicon is converted to single crystalline silicon. Active devices are formed in the electro-optical conversion material and the single crystalline silicon. The polycrystalline silicon is converted to single crystal silicon by the use of a laser. The top surface of the electro-optical material being a compound of gallium is covered by a containment layer during the device formations in the single crystal silicon.
The use of optical transmission reception between integrated circuits is known as shown by Barrett et al. In U.S. Pat. No. 3,486,029. The two discreet interconnected circuits are mounted on adjacent printed circuit boards, namely--discreet unpackaged device. Other forms of photo-optical interconnection is described in Javan in U.S. Pat. No. 4,041,475. This shows a memory system having optical transmitters and receivers in each cell location using a laser to selectively scan the surface to the appropriate location. Thus, Javan uses optical communications in lieu of addressing to read and write in discreet locations of an exposed or non-housed integrated circuit. Optical communication between regions on a gallium arsenide chip and to regions off the chip is illustrated by Fang et al. In U.S. Pat. No. 4,274,104.
Although the patents of the prior art shows optical communication on and to and from an integrated circuit, it fails to recognize the ability to use optical connectors to substantially increase the input-output ports on a packaged integrated circuit as well as providing the structure and method of fabricating the unique integrated circuit.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.